“The 6 percent gain from these advantages is about half what’s typically delivered when a chipmaker scales down transistors from one technology node to the next.”
Intel’s PowerVia test cores ran on Intel 4 FinFETs with the power wiring moved under the silicon. They gained over 6 percent in frequency and cut power loss by 30 percent, with cells packed up to 95 percent full. Next year Intel ships PowerVia and the new RibbonFET transistor at once. Half a node from rewiring is real, and Intel needs every fraction it can find.